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165
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DATE
2000
IEEE
16 years 3 hour ago
2000
IEEE
This paper presents a methodology towards synthesis of high performance analog circuits. Layout parasitics are estimated and compensated during circuit sizing. Physical layout con...
166
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IPPS
1999
IEEE
15 years 12 months ago
1999
IEEE
Condition based maintenance (CBM) seeks to generate a design for a new ship wide CMB system that performs diagnoses and failure prediction on Navy shipboard machinery. Eventually, ...
194
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GLVLSI
2009
IEEE
16 years 2 months ago
2009
IEEE
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
199
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IPPS
2007
IEEE
16 years 1 months ago
2007
IEEE
This paper focuses on message transfers across multiple heterogeneous high-performance networks in the NEWMADELEINE Communication Library. NEWMADELEINE features a modular design t...
187
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HIPEAC
2007
Springer
16 years 1 months ago
2007
Springer
Voltage scaling reduces leakage power for cache lines unlikely to be referenced soon. Partitioning reduces dynamic power via smaller, specialized structures. We combine approaches,...