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185
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ISCA
2007
IEEE
16 years 1 months ago
2007
IEEE
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
165
Voted
ISVLSI
2005
IEEE
16 years 1 months ago
2005
IEEE
The clock period in conventional pipeline scheme is proportional to the maximum delay while in hybrid wave-pipelining it is proportional to the maximum delay difference. An 8×8-b...
211
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GECCO
2007
Springer
16 years 1 months ago
2007
Springer
This research screens the tuning parameters of a combinatorial optimization heuristic. Specifically, it presents a Design of Experiments (DOE) approach that uses a Fractional Fac...
203
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HPCA
2000
IEEE
16 years 4 min ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
204
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EMSOFT
2004
Springer
15 years 11 months ago
2004
Springer
Separating the description of important aspects of a design such as behavior and architecture, or computation and communication, may yield significant advantages in design time as...