Layout parasitics have great impact on analog circuit performance. This paper presents an algorithm for explicit parasitic control during layout retargeting of analog integrated c...
We argue that designing a system that “guarantees” the privacy of its information may not be enough. One must also consider the price for providing that protection: For exampl...
Today several approaches using Situational Method Engineering paradigm exist, each of them proposes methods and techniques for developing ad-hoc design processes. In this context ...
This paper presents the Kuaba Ontology, a knowledge representation model for Design Rationale described in an ontology definition language. The representation of this model in a sp...
Adriana Pereira de Medeiros, Daniel Schwabe, Bruno...
—With the arrival of nanometer technologies wire delays are no longer negligible with respect to gate delays, and timing-closure becomes a major challenge to System-on-Chip desig...
Cheng-Hong Li, Rebecca L. Collins, Sampada Sonalka...