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DAC
2005
ACM
15 years 9 months ago
Template-driven parasitic-aware optimization of analog integrated circuit layouts
Layout parasitics have great impact on analog circuit performance. This paper presents an algorithm for explicit parasitic control during layout retargeting of analog integrated c...
Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J...
CIDR
2007
79views Algorithms» more  CIDR 2007»
15 years 9 months ago
Beyond Just Data Privacy
We argue that designing a system that “guarantees” the privacy of its information may not be enough. One must also consider the price for providing that protection: For exampl...
Bob Mungamuru, Hector Garcia-Molina
SAC
2009
ACM
16 years 2 months ago
A collaborative tool for designing and enacting design processes
Today several approaches using Situational Method Engineering paradigm exist, each of them proposes methods and techniques for developing ad-hoc design processes. In this context ...
Massimo Cossentino, Luca Sabatucci, Valeria Seidit...
ER
2005
Springer
146views Database» more  ER 2005»
16 years 1 months ago
Kuaba Ontology: Design Rationale Representation and Reuse in Model-Based Designs
This paper presents the Kuaba Ontology, a knowledge representation model for Design Rationale described in an ontology definition language. The representation of this model in a sp...
Adriana Pereira de Medeiros, Daniel Schwabe, Bruno...
MEMOCODE
2007
IEEE
16 years 1 months ago
Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design
—With the arrival of nanometer technologies wire delays are no longer negligible with respect to gate delays, and timing-closure becomes a major challenge to System-on-Chip desig...
Cheng-Hong Li, Rebecca L. Collins, Sampada Sonalka...