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» On Interleaving in Timed Automata
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ICCD
2001
IEEE
103views Hardware» more  ICCD 2001»
16 years 3 months ago
Improved ZDN-arithmetic for Fast Modulo Multiplication
In 1987 Sedlak proposed a modulo multiplication algorithm which is suitable for smart card implementation due to it’s low latency time. It is based on ZDN (zwei_drittel_N) arith...
Hagen Ploog, Sebastian Flügel, Dirk Timmerman...
ICCAD
2003
IEEE
105views Hardware» more  ICCAD 2003»
16 years 3 months ago
TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers
We present a new approach for TAM optimization and test scheduling in the modular testing of mixed-signal SOCs. A test planning approach for digital SOCs is extended to handle ana...
Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty
DDECS
2006
IEEE
95views Hardware» more  DDECS 2006»
16 years 25 days ago
Parallel Memory Architecture for Arbitrary Stride Accesses
—Parallel memory modules can be used to increase memory bandwidth and feed a processor with only necessary data. Arbitrary stride access capability with interleaved memories is d...
Eero Aho, Jarno Vanne, Timo D. Hämäl&aum...
151
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IAT
2006
IEEE
16 years 24 days ago
Towards High-Level Programming for Distributed Problem Solving
We present a new approach to distributed problem solving based on high-level program execution. While this technique has proven itself for single-agent systems based on the Golog ...
Ryan F. Kelly, Adrian R. Pearce
ICDM
2006
IEEE
183views Data Mining» more  ICDM 2006»
16 years 24 days ago
Accelerating Newton Optimization for Log-Linear Models through Feature Redundancy
— Log-linear models are widely used for labeling feature vectors and graphical models, typically to estimate robust conditional distributions in presence of a large number of pot...
Arpit Mathur, Soumen Chakrabarti