Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dyn...
Marsha Chechik, Benet Devereux, Steve M. Easterbro...
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...
Research on how to reason about correctness properties of software systems using model checking is advancing rapidly. Work on exnite-state models from program source code and on ab...
James C. Corbett, Matthew B. Dwyer, John Hatcliff,...
Guided Abstraction Simplification Roberto Giacobazzi1 and Francesco Ranzato2 1 University of Verona, Italy 2 University of Padova, Italy Abstract. In static analysis, approximation...