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» On Modeling Cross-Talk Faults
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JSS
2008
122views more  JSS 2008»
15 years 5 months ago
Traffic-aware stress testing of distributed real-time systems based on UML models using genetic algorithms
This report presents a model-driven, stress test methodology aimed at increasing chances of discovering faults related to network traffic in Distributed Real-Time Systems (DRTS). T...
Vahid Garousi, Lionel C. Briand, Yvan Labiche
ITC
1991
IEEE
86views Hardware» more  ITC 1991»
15 years 10 months ago
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
F. Joel Ferguson, Tracy Larrabee
DFT
2007
IEEE
109views VLSI» more  DFT 2007»
16 years 1 months ago
Safety Evaluation of NanoFabrics
Chemically Assembled Electronic Nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing di...
Michelangelo Grosso, Maurizio Rebaudengo, Matteo S...
DFT
1994
IEEE
121views VLSI» more  DFT 1994»
15 years 10 months ago
Reconfiguration in 3D Meshes
The 1: track model for fault tolerant 2 0 processor arrays is extended to 30 mesh architectures. Non-intersecting, continuous, straight and non-near miss compensation paths are co...
Anuj Chandra, Rami G. Melhem
ASM
2008
ASM
15 years 8 months ago
FDIR Architectures for Autonomous Spacecraft: Specification and Assessment with Event-B
On-board Fault Detection, Isolation and Recovery (FDIR) systems are considered to ensure the safety and to increase the autonomy of spacecrafts. They shall be carefully designed an...
Jean-Charles Chaudemar, Charles Castel, Christel S...