1793 search results - page 259 / 359 » On the Design of Codes for DNA Computing |
167
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CODES
2006
IEEE
16 years 27 days ago
2006
IEEE
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
164
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ICRA
2000
IEEE
15 years 11 months ago
2000
IEEE
We present an approach for automatically generating complete process plans, including xturing and CNC code, from high level shape feature part descriptions. The demonstration syst...
201
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CODES
2007
IEEE
15 years 10 months ago
2007
IEEE
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
192
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CODES
2009
IEEE
15 years 10 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
211
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CODES
2006
IEEE
16 years 27 days ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...