Sciweavers

4763 search results - page 626 / 953
» On the Execution of Deep Models
Sort
View
ASPDAC
2009
ACM
110views Hardware» more  ASPDAC 2009»
16 years 2 months ago
Variability-aware robust design space exploration of chip multiprocessor architectures
Abstract— In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufactu...
Gianluca Palermo, Cristina Silvano, Vittorio Zacca...
DATE
2008
IEEE
155views Hardware» more  DATE 2008»
16 years 2 months ago
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
Pierre Guironnet de Massas, Frédéric...
DATE
2008
IEEE
171views Hardware» more  DATE 2008»
16 years 2 months ago
Cache Aware Mapping of Streaming Applications on a Multiprocessor System-on-Chip
Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor systemon-chip. An external memory that is shared between processors is a bottl...
Arno Moonen, Marco Bekooij, Rene van den Berg, Jef...
ICRA
2008
IEEE
185views Robotics» more  ICRA 2008»
16 years 2 months ago
Humanoid teleoperation for whole body manipulation
— We present results of successful telemanipulation of large, heavy objects by a humanoid robot. Using a single joystick the operator controls walking and whole body manipulation...
Mike Stilman, Koichi Nishiwaki, Satoshi Kagami
IEEESCC
2008
IEEE
16 years 1 months ago
Development Tool for Service-Oriented Applications in Smart Homes
In this paper, we present a model-driven, domaincentric tool allowing the specification of service-oriented ions through abstract services composition. Executable applications, ma...
Jianqi Yu, Philippe Lalanda, Stéphanie Chol...