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» On the Meaning of Logical Completeness
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DATE
2002
IEEE
96views Hardware» more  DATE 2002»
16 years 18 days ago
Modeling Techniques and Tests for Partial Faults in Memory Devices
: It has always been assumed that fault models in memories are sufficiently precise for specifying the faulty behavior. This means that, given a fault model, it should be possible...
Zaid Al-Ars, A. J. van de Goor
ESM
2000
15 years 9 months ago
SEP: Simulation framework to evaluate digital hardware architectures
Know-how is the most useful mean for designing new processors before a complete hardware description. The integration rate is increasing very quickly and the timeto-market has to ...
Frédéric Mallet, Fernand Boér...
CORR
2010
Springer
122views Education» more  CORR 2010»
15 years 7 months ago
Specifying Reusable Components
Reusable software components need well-defined interfaces, rigorously and completely documented features, and a design amenable both to reuse and to formal verification; all these...
Nadia Polikarpova, Carlo A. Furia, Bertrand Meyer
ENTCS
2002
95views more  ENTCS 2002»
15 years 7 months ago
A Proof Dedicated Meta-Language
We describe a proof dedicated meta-language, called Ltac, in the context of the Coq proof assistant. This new layer of meta-language is quite appropriate to write small and local ...
David Delahaye
MR
2007
120views Robotics» more  MR 2007»
15 years 7 months ago
Advanced electronic prognostics through system telemetry and pattern recognition methods
Electronic Prognostics (EP) is a technique used in high-reliability and high-availability systems to actively and proactively detect faults, allowing the reduction of system downt...
Leon Lopez