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» On the Meaning of Logical Completeness
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FMCAD
2007
Springer
16 years 1 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
ASPDAC
2004
ACM
151views Hardware» more  ASPDAC 2004»
16 years 1 months ago
Combinatorial group testing methods for the BIST diagnosis problem
— We examine an abstract formulation of BIST diagnosis in digital logic systems. The BIST diagnosis problem has applications that include identification of erroneous test vector...
Andrew B. Kahng, Sherief Reda
RTA
2004
Springer
16 years 28 days ago
Rewriting for Fitch Style Natural Deductions
Logical systems in natural deduction style are usually presented in the Gentzen style. A different definition of natural deduction, that corresponds more closely to proofs in ord...
Herman Geuvers, Rob Nederpelt
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
16 years 25 days ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
COCO
2003
Springer
114views Algorithms» more  COCO 2003»
16 years 24 days ago
Bounded Nondeterminism and Alternation in Parameterized Complexity Theory
We give machine characterisations and logical descriptions of a number of parameterized complexity classes. The focus of our attention is the class W[P], which we characterise as ...
Yijia Chen, Jörg Flum, Martin Grohe