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» On the architecture of software component systems
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RTAS
2006
IEEE
16 years 1 months ago
Real-Time Scheduling on Multicore Platforms
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
James H. Anderson, John M. Calandrino, UmaMaheswar...
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 12 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
FPL
2009
Springer
156views Hardware» more  FPL 2009»
15 years 11 months ago
A highly scalable Restricted Boltzmann Machine FPGA implementation
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
Sang Kyun Kim, Lawrence C. McAfee, Peter L. McMaho...
ASAP
1997
IEEE
156views Hardware» more  ASAP 1997»
15 years 11 months ago
Design methodology for digital signal processing
Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challeng...
Gerhard Fettweis
DAC
1996
ACM
15 years 11 months ago
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis
This paper proposes a state encoding method for asynchronous circuits based on the theory of regions. A region in a Transition System is a set of states that "behave uniforml...
Jordi Cortadella, Michael Kishinevsky, Alex Kondra...
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