In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
Clusters of workstations have emerged as a popular platform for parallel and distributed computing. Commodity high speed networks which are used to connect workstation clusters pr...
Vijay Moorthy, Matthew G. Jacunski, Manoj Pillai, ...
Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the...
David I. August, John W. Sias, Jean-Michel Puiatti...
The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...