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164
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BMCBI
2008
135views more  BMCBI 2008»
15 years 7 months ago
Fregene: Simulation of realistic sequence-level data in populations and ascertained samples
Background: FREGENE simulates sequence-level data over large genomic regions in large populations. Because, unlike coalescent simulators, it works forwards through time, it allows...
Marc Chadeau-Hyam, Clive J. Hoggart, Paul F. O'Rei...
CL
2000
Springer
15 years 10 months ago
Towards an Efficient Tableau Method for Boolean Circuit Satisfiability Checking
Boolean circuits offer a natural, structured, and compact representation of Boolean functions for many application domains. In this paper a tableau method for solving satisfiabilit...
Tommi A. Junttila, Ilkka Niemelä
226
Voted
AADEBUG
2005
Springer
16 years 19 days ago
Specifying and checking component usage
One of today’s challenges is producing reliable software in the face of an increasing number of interacting components. Our system CHET lets developers define specifications des...
Steven P. Reiss
170
Voted
DAC
2009
ACM
15 years 11 months ago
Non-cycle-accurate sequential equivalence checking
We present a novel technique for Sequential Equivalence Checking (SEC) between non-cycle-accurate designs. The problem is routinely encountered in verifying the correctness of a s...
Pankaj Chauhan, Deepak Goyal, Gagan Hasteer, Anmol...
DAC
2012
ACM
13 years 9 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie