Sciweavers

7280 search results - page 1165 / 1456
» Optimization Techniques
Sort
View
192
Voted
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 4 months ago
Long-term Performance Bottleneck Analysis and Prediction
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
Fei Gao, Suleyman Sair
218
Voted
ICCD
2002
IEEE
140views Hardware» more  ICCD 2002»
16 years 4 months ago
Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model
— In this paper, we present a new interconnect delay model called Fitted Elmore delay (FED). FED is generated by approximating Hspice delay data using a curve fitting technique....
Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Ch...
200
Voted
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
16 years 4 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
197
Voted
ICCAD
2004
IEEE
145views Hardware» more  ICCAD 2004»
16 years 4 months ago
Accurate estimation of global buffer delay within a floorplan
Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anyw...
Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar,...
172
Voted
PADL
2010
Springer
16 years 4 months ago
Automating Mathematical Program Transformations
Abstract. Mathematical programs (MPs) are a class of constrained optimization problems that include linear, mixed-integer, and disjunctive programs. Strategies for solving MPs rely...
Ashish Agarwal, Sooraj Bhat, Alexander Gray, Ignac...
« Prev « First page 1165 / 1456 Last » Next »