Sciweavers

7280 search results - page 1295 / 1456
» Optimization Techniques
Sort
View
176
Voted
ISPASS
2007
IEEE
16 years 1 months ago
Cross Binary Simulation Points
Architectures are usually compared by running the same workload on each architecture and comparing performance. When a single compiled binary of a program is executed on many diff...
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jal...
175
Voted
GECCO
2007
Springer
192views Optimization» more  GECCO 2007»
16 years 1 months ago
On the runtime analysis of the 1-ANT ACO algorithm
The runtime analysis of randomized search heuristics is a growing field where, in the last two decades, many rigorous results have been obtained. These results, however, apply pa...
Benjamin Doerr, Frank Neumann, Dirk Sudholt, Carst...
ISVC
2007
Springer
16 years 1 months ago
Boosting with Temporal Consistent Learners: An Application to Human Activity Recognition
We present a novel boosting algorithm where temporal consistency is addressed in a short-term way. Although temporal correlation of observed data may be an important cue for classi...
Pedro Canotilho Ribeiro, Plinio Moreno, José...
213
Voted
LCTRTS
2007
Springer
16 years 1 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
181
Voted
DFT
2006
IEEE
105views VLSI» more  DFT 2006»
16 years 1 months ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...
« Prev « First page 1295 / 1456 Last » Next »