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HPCA
2003
IEEE
16 years 7 months ago
Dynamic Optimization of Micro-Operations
Inherent within complex instruction set architectures such as x86 are inefficiencies that do not exist in a simpler ISAs. Modern x86 implementations decode instructions into one o...
Brian Slechta, David Crowe, Brian Fahs, Michael Fe...
ICDE
2010
IEEE
248views Database» more  ICDE 2010»
16 years 7 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...
PPOPP
2010
ACM
16 years 4 months ago
Scheduling support for transactional memory contention management
Transactional Memory (TM) is considered as one of the most promising paradigms for developing concurrent applications. TM has been shown to scale well on multiple cores when the d...
Walther Maldonado, Patrick Marlier, Pascal Felber,...
IPPS
2009
IEEE
16 years 2 months ago
Taking the heat off transactions: Dynamic selection of pessimistic concurrency control
In this paper we investigate feedback-directed dynamic selection between different implementations of atomic blocks. We initially execute atomic blocks using STM with optimistic c...
Nehir Sönmez, Tim Harris, Adrián Crist...
CASES
2009
ACM
16 years 1 months ago
Fine-grain performance scaling of soft vector processors
Embedded systems are often implemented on FPGA devices and 25% of the time [2] include a soft processor— a processor built using the FPGA reprogrammable fabric. Because of their...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...