1075 search results - page 17 / 215 » Parallel Programming with Transactional Memory |
178
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SSS
2010
Springer
15 years 4 months ago
2010
Springer
We present a distributed transactional memory (TM) scheduler called Bi-interval that optimizes the execution order of transactional operations to minimize conflicts. Bi-interval c...
155
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SAC
2010
ACM
16 years 26 days ago
2010
ACM
Hardware transactional memory is a promising synchronization technology for chip-multiprocessors. It simplifies programming of concurrent applications and allows for higher concu...
150
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IPPS
2009
IEEE
16 years 1 months ago
2009
IEEE
In this paper we use Dijkstra’s algorithm as a challenging, hard to parallelize paradigm to test the efficacy of several parallelization techniques in a multicore architecture....
111
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PPOPP
2006
ACM
16 years 10 days ago
2006
ACM
150
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PPOPP
2010
ACM
15 years 10 months ago
2010
ACM
