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WCRE
2003
IEEE
15 years 12 months ago
Extracting an Explicitly Data-Parallel Representation of Image-Processing Programs
Our research goal is to retarget image processing programs written in sequential languages (e.g., C) to architectures with data-parallel processing capabilities. Image processing ...
Lewis B. Baumstark Jr., Murat Guler, Linda M. Will...
ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
13 years 9 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...
CORR
2010
Springer
109views Education» more  CORR 2010»
15 years 6 months ago
Dirty Paper Coding using Sign-bit Shaping and LDPC Codes
Dirty paper coding (DPC) refers to methods for pre-subtraction of known interference at the transmitter of a multiuser communication system. There are numerous applications for DPC...
G. Shilpa, Andrew Thangaraj, Srikrishna Bhashyam
COORDINATION
2005
Springer
16 years 4 days ago
Preserving Architectural Properties in Multithreaded Code Generation
Architectural descriptions can provide support for a formal representation of the structure and the overall behavior of software systems, which is suitable for an early assessment ...
Marco Bernardo, Edoardo Bontà
IPPS
2010
IEEE
15 years 4 months ago
Improving numerical reproducibility and stability in large-scale numerical simulations on GPUs
The advent of general purpose graphics processing units (GPGPU's) brings about a whole new platform for running numerically intensive applications at high speeds. Their multi-...
Michela Taufer, Omar Padron, Philip Saponaro, Sand...