Sciweavers

3656 search results - page 547 / 732
» Parallel programming in Split-C
Sort
View
IEEEPACT
2008
IEEE
16 years 1 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
IPPS
2008
IEEE
16 years 1 months ago
Overcoming scaling challenges in biomolecular simulations across multiple platforms
NAMD† is a portable parallel application for biomolecular simulations. NAMD pioneered the use of hybrid spatial and force decomposition, a technique now used by most scalable pr...
Abhinav Bhatele, Sameer Kumar, Chao Mei, James C. ...
CLUSTER
2007
IEEE
16 years 1 months ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...
IEEEPACT
2007
IEEE
16 years 1 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
ESTIMEDIA
2007
Springer
16 years 1 months ago
Leveraging Predicated Execution for Multimedia Processing
—Modern compression standards such as H.264, DivX, or VC-1 provide astonishing quality at the costs of steadily increasing processing requirements. Therefore, efficient solution...
Dietmar Ebner, Florian Brandner, Andreas Krall