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» Performance Analysis Framework for Layout Analysis Methods
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VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
16 years 8 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
CTRSA
2003
Springer
96views Cryptology» more  CTRSA 2003»
16 years 25 days ago
Hardware Performance Characterization of Block Cipher Structures
In this paper, we present a general framework for evaluating the performance characteristics of block cipher structures composed of S-boxes and Maximum Distance Separable (MDS) ma...
Lu Xiao, Howard M. Heys
ISCC
2002
IEEE
118views Communications» more  ISCC 2002»
16 years 16 days ago
A study of QoS performance for real time applications over a differentiated services network
Abstract: The Differentiated Service Architecture (DiffServ) is currently a popular research topic as a lowcost method to provide Quality of Service to the different applications i...
Evi Tsolakou, Eugenia G. Nikolouzou, Iakovos S. Ve...
DEDS
2010
88views more  DEDS 2010»
15 years 7 months ago
On the Performance Evaluation of Multi-Guarded Marked Graphs with Single-Server Semantics
In discrete event systems, a given task can start executing when all the required input data are available. The required input data for a given task may change along the evolution...
Jorge Júlvez, Jordi Cortadella, Michael Kis...
CORR
2002
Springer
105views Education» more  CORR 2002»
15 years 7 months ago
The Basque task: did systems perform in the upperbound?
In this paper we describe the Senseval 2 Basque lexicalsample task. The task comprised 40 words (15 nouns, 15 verbs and 10 adjectives) selected from Euskal Hiztegia...
Eneko Agirre, Elena Garcia, Mikel Lersundi, David ...