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ERSA
2010
159views Hardware» more  ERSA 2010»
15 years 4 months ago
Acceleration of FPGA Fault Injection Through Multi-Bit Testing
SRAM-based FPGA devices are an attractive option for data processing on space-based platforms, due to high computational capabilities and a lower power envelope than traditional pr...
Grzegorz Cieslewski, Alan D. George, Adam Jacobs
SI3D
2003
ACM
15 years 11 months ago
Application of the two-sided depth test to CSG rendering
Shadow mapping is a technique for doing real-time shadowing. Recent work has shown that shadow mapping hardware can be used as a second depth test in addition to the z-test. In th...
Sudipto Guha, Shankar Krishnan, Kamesh Munagala, S...
VTS
2000
IEEE
103views Hardware» more  VTS 2000»
15 years 11 months ago
Invariance-Based On-Line Test for RTL Controller-Datapath Circuits
We present a low-cost on-line test methodology for RTL controller-datapath pairs, based on the notion of path invariance. The fundamental observation supporting the proposed metho...
Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailogl...
ICSE
2008
IEEE-ACM
16 years 7 months ago
Using JULE to generate a compliance test suite for the UML standard
The Java-UML Lightweight Enumerator (JULE) tool implements a vitally important aspect of the framework for software tool certification - test suite generation. The framework uses ...
Panuchart Bunyakiati, Anthony Finkelstein, James S...
DATE
2004
IEEE
131views Hardware» more  DATE 2004»
15 years 10 months ago
Efficient Modular Testing of SOCs Using Dual-Speed TAM Architectures
The increasing complexity of system-on-chip (SOC) integrated circuits has spurred the development of versatile automatic test equipment (ATE) that can simultaneously drive differe...
Anuja Sehgal, Krishnendu Chakrabarty