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DATE
2007
IEEE
94views Hardware» more  DATE 2007»
16 years 27 days ago
Register pointer architecture for efficient embedded processors
JongSoo Park, Sung-Boem Park, James D. Balfour, Da...
SCOPES
2007
Springer
16 years 20 days ago
Efficient event-driven simulation of parallel processor architectures
Alexey Kupriyanov, Dmitrij Kissler, Frank Hannig, ...
CODES
2010
IEEE
15 years 4 months ago
Dynamic, non-linear cache architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
Garo Bournoutian, Alex Orailoglu
DAC
2010
ACM
15 years 10 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
IEEECGIV
2006
IEEE
16 years 17 days ago
Real-Time Tracking with Non-Rigid Geometric Templates Using the GPU
The tracking of features in real-time video streams forms the integral part of many important applications in human-computer interaction and computer vision. Unfortunately trackin...
Julius Fabian Ohmer, Frédéric Maire,...