1238 search results - page 96 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
183
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HPCA
2007
IEEE
16 years 7 months ago
2007
IEEE
If-conversion is a compiler technique that reduces the misprediction penalties caused by hard-to-predict branches, transforming control dependencies into data dependencies. Althou...
196
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TPDS
2008
15 years 6 months ago
2008
This paper presents the Mitosis framework, which is a combined hardware-software approach to speculative multithreading, even in the presence of frequent dependences among threads....
205
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HIPC
2009
Springer
15 years 4 months ago
2009
Springer
Recently proposed techniques for peak power management [18] involve centralized decisionmaking and assume quick evaluation of the various power management states. These techniques...
208
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ASPLOS
2010
ACM
15 years 10 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
202
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ARCS
2009
Springer
16 years 1 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...