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DAC
1996
ACM
15 years 11 months ago
Sizing of Clock Distribution Networks for High Performance CPU Chips
: In a high performance microprocessor such as Digital's 300MHz Alpha 21164, the distribution of a high quality clock signal to all regions of the device is achieved using a c...
Madhav P. Desai, Radenko Cvijetic, James Jensen
221
Voted
DAC
2010
ACM
15 years 7 months ago
Parallel multigrid preconditioning on graphics processing units (GPUs) for robust power grid analysis
Leveraging the power of nowadays graphics processing units for robust power grid simulation remains a challenging task. Existing preconditioned iterative methods that require inco...
Zhuo Feng, Zhiyu Zeng
FCCM
2009
IEEE
133views VLSI» more  FCCM 2009»
16 years 1 months ago
Exploiting Partially Reconfigurable FPGAs for Situation-Based Reconfiguration in Wireless Sensor Networks
—Wireless sensor networks (WSNs) are typically composed of very small, battery-operated devices (sensor nodes) containing simple microprocessors with few computational resources....
Rafael Garcia, Ann Gordon-Ross, Alan D. George
175
Voted
SECON
2008
IEEE
16 years 1 months ago
Gateway Design for Data Gathering Sensor Networks
—Innovation in gateways for data gathering sensor networks has lagged compared to advances in mote-class devices, leaving us with a limited set of options for deploying such syst...
Raluca Musaloiu-Elefteri, Razvan Musaloiu-Elefteri...
196
Voted
MICRO
2009
IEEE
134views Hardware» more  MICRO 2009»
16 years 1 months ago
A case for dynamic frequency tuning in on-chip networks
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
Asit K. Mishra, Reetuparna Das, Soumya Eachempati,...