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FPL
2006
Springer
127views Hardware» more  FPL 2006»
15 years 11 months ago
On-FPGA Communication Architectures and Design Factors
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
CASES
2001
ACM
15 years 11 months ago
Heads and tails: a variable-length instruction format supporting parallel fetch and decode
Abstract. Existing variable-length instruction formats provide higher code densities than fixed-length formats, but are ill-suited to pipelined or parallel instruction fetch and de...
Heidi Pan, Krste Asanovic
APCSAC
2000
IEEE
15 years 11 months ago
Dataflow Java: Implicitly Parallel Java
Dataflow computation models enable simpler and more efficient management of the memory hierarchy - a key barrier to the performance of many parallel programs. This paper describes...
Gareth Lee, John Morris
IWANN
1995
Springer
15 years 11 months ago
EL-SIM: a Development Environment for Neuro-Fuzzy Intelligent Controllers
1 This paper presents a new technique for the design of real-time controllers based on a hybrid approach which integrates several control strategies, such as intelligent controlle...
Marcello Chiaberge, G. Di Bene, S. Di Pascoli, R. ...
ITC
1991
IEEE
80views Hardware» more  ITC 1991»
15 years 11 months ago
An Intelligent Approach to Automatic Test Equipment
In diagnosing a failed system, a smart technician would choose tests to be performed based on the context of the situation. Currently, test program sets do not fault-. isolate wit...
William R. Simpson, John W. Sheppard
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