390 search results - page 26 / 78 » Power system on a chip (PSoC) |
190
click to vote
ISCA
2009
IEEE
16 years 1 months ago
2009
IEEE
Dynamic voltage and frequency scaling (DVFS) is a commonly-used powermanagement scheme that dynamically adjusts power and performance to the time-varying needs of running programs...
172
click to vote
ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Emerging VLSI technologies and platforms are giving rise to systems with inherently high potential for runtime failure. Such failures range from intermittent electrical and mechan...
167
click to vote
ISPD
2005
ACM
16 years 7 days ago
2005
ACM
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
275
click to vote
ISCA
2011
IEEE
14 years 10 months ago
2011
IEEE
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
162
click to vote
CODES
2006
IEEE
16 years 22 days ago
2006
IEEE
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...