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CODES
2000
IEEE
15 years 11 months ago
Towards a new standard for system-level design
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
Stan Y. Liao
DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 10 months ago
Finding reset nondeterminism in RTL designs - scalable X-analysis methodology and case study
Due to increases in design complexity, routing a reset signal to all registers is becoming more difficult. One way to solve this problem is to reset only certain registers and rely...
Hong-Zu Chou, Haiqian Yu, Kai-Hui Chang, Dylan Dob...
TSP
2008
134views more  TSP 2008»
15 years 6 months ago
A Mapping-Based Design for Nonsubsampled Hourglass Filter Banks in Arbitrary Dimensions
Multidimensional hourglass filter banks decompose the frequency spectrum of input signals into hourglass-shaped directional subbands, each aligned with one of the frequency axes. T...
Yue M. Lu, Minh N. Do
DAC
2003
ACM
16 years 7 months ago
Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system
This paper describes a case study and design flow of a secure embedded system called ThumbPod, which uses cryptographic and biometric signal processing acceleration. It presents t...
David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazu...
HPCA
2003
IEEE
16 years 7 months ago
A Methodology for Designing Efficient On-Chip Interconnects on Well-Behaved Communication Patterns
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
Wai Hong Ho, Timothy Mark Pinkston