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» Processor Architectures for Ontogenesis
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226
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DAC
1997
ACM
15 years 11 months ago
ISDL: An Instruction Set Description Language for Retargetability
Abstract—We present the Instruction Set Description Language, ISDL, a machine description language used to describe target architectures to a retargetable compiler. The features ...
George Hadjiyiannis, Silvina Hanono, Srinivas Deva...
TPDS
2010
98views more  TPDS 2010»
15 years 5 months ago
The Synchronization Power of Coalesced Memory Accesses
—Multicore architectures have established themselves as the new generation of computer architectures. As part of the one core to many cores evolution, memory access mechanisms ha...
Phuong Hoai Ha, Philippas Tsigas, Otto J. Anshus
171
Voted
DSD
2003
IEEE
121views Hardware» more  DSD 2003»
16 years 8 days ago
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors
With shrinking feature size of silicon fabrication technology, architects are putting more and more logic into a single die. While one might opt to use these transistors for build...
Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemi...
195
Voted
HPCA
2009
IEEE
16 years 7 months ago
Architectural Contesting
Previous studies have proposed techniques to dynamically change the architecture of a processor to better suit the characteristics of the workload at hand. However, all such appro...
Hashem Hashemi Najaf-abadi, Eric Rotenberg
ASAP
2006
IEEE
169views Hardware» more  ASAP 2006»
16 years 1 months ago
A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...
Hritam Dutta, Frank Hannig, Jürgen Teich, Ben...