378 search results - page 16 / 76 » Processor Modeling for Hardware Software Codesign |
189
Voted
CODES
2007
IEEE
16 years 21 days ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
213
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CASES
2006
ACM
16 years 10 days ago
2006
ACM
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
174
Voted
ECOOP
2008
Springer
15 years 8 months ago
2008
Springer
Abstract. The paradigm shift in processor design from monolithic processors to multicore has renewed interest in programming models that facilitate parallelism. While multicores ar...
163
Voted
HICSS
2006
IEEE
16 years 12 days ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
174
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CODES
2006
IEEE
16 years 13 days ago
2006
IEEE
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...