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ICPP
1999
IEEE
15 years 11 months ago
Impact on Performance of Fused Multiply-Add Units in Aggressive VLIW Architectures
Loops are the main time consuming part of programs based on floating point computations. The performance of the loops is limited either by recurrences in the computation or by the...
David López, Josep Llosa, Eduard Ayguad&eac...
ICPP
1999
IEEE
15 years 11 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
IPPS
1999
IEEE
15 years 11 months ago
High Performance Computing for the Masses
Abstract. Recent advances in software and hardware for clustered computing have allowed scientists and computing specialists to take advantage of commodity processors in solving ch...
Mark J. Clement, Quinn Snell, Glenn Judd
IPPS
1999
IEEE
15 years 11 months ago
An Adaptive, Fault-Tolerant Implementation of BSP for JAVA-Based Volunteer Computing Systems
Abstract. In recent years, there has been a surge of interest in Javabased volunteer computing systems, which aim to make it possible to build very large parallel computing network...
Luis F. G. Sarmenta
ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
15 years 11 months ago
Test pattern generation for width compression in BIST
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
Paulo F. Flores, Horácio C. Neto, K. Chakra...
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