Sciweavers

5762 search results - page 426 / 1153
» R-tree: A Hardware Implementation
Sort
View
ERSA
2006
89views Hardware» more  ERSA 2006»
15 years 9 months ago
Multi-Mode Operator for SHA-2 Hash Functions
We propose an improved implementation of the SHA-2 hash family to include a multi-mode of operation with minimal latency and hardware requirements over the entire operator. The mul...
Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arn...
DATE
2010
IEEE
146views Hardware» more  DATE 2010»
15 years 8 months ago
Automatic pipelining from transactional datapath specifications
Abstract—We present a transactional datapath specification (Tspec) and the tool (T-piper) to synthesize automatically an inpelined implementation from it. T-spec abstractly views...
Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-...
CG
2006
Springer
15 years 7 months ago
A realtime immersive application with realistic lighting: The Parthenon
Off-line rendering techniques have nowadays reached an astonishing level of realism but pay the cost of long computational times. The new generation of programmable graphic hardwa...
Marco Callieri, Paul E. Debevec, J. Pair, Roberto ...
CGF
2005
121views more  CGF 2005»
15 years 7 months ago
Efficient Rendering of Local Subsurface Scattering
A novel approach is presented to efficiently render local subsurface scattering effects. We introduce an importance sampling scheme for a practical subsurface scattering model. It...
Tom Mertens, Jan Kautz, Philippe Bekaert, Frank Va...
CAI
2004
Springer
15 years 7 months ago
An Evolvable Combinational Unit for FPGAs
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
Lukás Sekanina, Stepan Friedl