5762 search results - page 907 / 1153 » R-tree: A Hardware Implementation |
236
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ISPASS
2008
IEEE
16 years 1 months ago
2008
IEEE
The evolution of microprocessors has been hindered by their increasing power consumption and the heat generation speed on-die. High temperature impairs the processor’s reliabili...
236
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MICRO
2008
IEEE
16 years 1 months ago
2008
IEEE
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
236
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SASP
2008
IEEE
16 years 1 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
191
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ISCA
2007
IEEE
16 years 1 months ago
2007
IEEE
Conventional load/store queues (LSQs) are an impediment to both power-efficient execution in superscalar processors and scaling to large-window designs. In this paper, we propose...
210
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ISCA
2007
IEEE
16 years 1 months ago
2007
IEEE
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...