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DATE
2006
IEEE
152views Hardware» more  DATE 2006»
16 years 1 months ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
16 years 1 months ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
ICPADS
2006
IEEE
16 years 1 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl...
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
16 years 1 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
WIOPT
2006
IEEE
16 years 1 months ago
Analytical modeling of ad hoc networks that utilize space-time coding
— This paper presents the first analytical model for ad hoc networks equipped with multiple-input multiple-output (MIMO) radios using space-time coding (STC) that considers the ...
Marcelo M. Carvalho, J. J. Garcia-Luna-Aceves