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» Reducing Compilation Time Overhead in Compiled Simulators
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171
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INFOCOM
2006
IEEE
16 years 12 days ago
Efficient Flooding Scheme Based on 1-Hop Information in Mobile Ad Hoc Networks
—Flooding is one of the most fundamental operations in mobile ad hoc networks. Traditional implementation of flooding suffers from the problems of excessive redundancy of message...
Hai Liu, Peng-Jun Wan, Xiaohua Jia, Xinxin Liu, F....
187
Voted
AICCSA
2008
IEEE
209views Hardware» more  AICCSA 2008»
15 years 8 months ago
Transistor-level based defect tolerance for reliable nanoelectronics
Nanodevices based circuit design will be based on the acceptance that a high percentage of devices in the design will be defective. In this work, we investigate a defect tolerant ...
Aiman H. El-Maleh, Bashir M. Al-Hashimi, Aissa Mel...
177
Voted
CODES
2008
IEEE
16 years 25 days ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
147
Voted
HPCS
2006
IEEE
16 years 12 days ago
Toward a Software Infrastructure for the Cyclops-64 Cellular Architecture
This paper presents the initial design of the Cyclops-64 (C64) system software infrastructure and tools under development as a joint effort between IBM T.J. Watson Research Center...
Juan del Cuvillo, Weirong Zhu, Ziang Hu, Guang R. ...
141
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PPOPP
2003
ACM
15 years 11 months ago
Programming the FlexRAM parallel intelligent memory system
In an intelligent memory architecture, the main memory of a computer is enhanced with many simple processors. The result is a highly-parallel, heterogeneous machine that is able t...
Basilio B. Fraguela, Jose Renau, Paul Feautrier, D...