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181
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ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
16 years 19 days ago
Peak temperature control and leakage reduction during binding in high level synthesis
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...
SC
2005
ACM
16 years 19 days ago
Automatic Tuning of Inlining Heuristics
Inlining improves the performance of programs by reducing the overhead of method invocation and increasing the opportunities for compiler optimization. Incorrect inlining decision...
John Cavazos, Michael F. P. O'Boyle
172
Voted
HICSS
2002
IEEE
80views Biometrics» more  HICSS 2002»
16 years 1 days ago
EasyWinWin: Managing Complexity in Requirements Negotiation with GSS
More than ¾ of large software projects suffer large cost and schedule overruns or fail outright. Deficits in project requirements cause more than half of these failures and overr...
Robert O. Briggs, Paul Grünbacher
196
Voted
DCC
2000
IEEE
15 years 11 months ago
Arithmetic Coding for Low Power Embedded System Design
We present a novel algorithm that assigns codes to instructions during instruction code compression in order to minimize bus-related bit-toggling and thus reducing power consumpti...
Haris Lekatsas, Wayne Wolf, Jörg Henkel
ICPP
2000
IEEE
15 years 11 months ago
Multilayer VLSI Layout for Interconnection Networks
Current VLSI technology allows more than two wiring layers and the number is expected to rise in future. In this paper, we show that, by designing VLSI layouts directly for an L-l...
Chi-Hsiang Yeh, Emmanouel A. Varvarigos, Behrooz P...