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» Reducing the Complexity of Reductions
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ISLPED
2010
ACM
229views Hardware» more  ISLPED 2010»
15 years 7 months ago
An energy efficient cache design using spin torque transfer (STT) RAM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatte...
137
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CORR
2002
Springer
93views Education» more  CORR 2002»
15 years 7 months ago
Synthesis of Low-Power Digital Circuits Derived from Binary Decision Diagrams
-- This paper introduces a novel method for synthesizing digital circuits derived from Binary Decision Diagrams (BDDs) that can yield to reduction in power dissipation. The power r...
Denis V. Popel
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
15 years 6 months ago
Combining optimizations in automated low power design
—Starting from sequential programs, we present an approach combining data reuse, multi-level MapReduce, and pipelining to automatically find the most power-efficient designs th...
Qiang Liu, Tim Todman, Wayne Luk
ICIRA
2010
Springer
115views Robotics» more  ICIRA 2010»
15 years 6 months ago
A Resistance Compensation Control Algorithm for a Cable-Driven Hand Exoskeleton for Motor Function Rehabilitation
The resistance compensation, especially the friction compensation in the Bowden cable transmission is a difficult issue to be handled. Aimed to the resistance reduction requirement...
Shuang Wang, Jiting Li, Ruoyin Zheng
TRANSCI
2011
80views more  TRANSCI 2011»
15 years 2 months ago
The Dynamic Uncapacitated Hub Location Problem
This paper presents a dynamic (or multi-period) hub location problem. It proposes a branch-and-bound algorithm that uses a Lagrangean relaxation to obtain lower and upper bounds a...
Ivan Contreras, Jean-François Cordeau, Gilb...