6568 search results - page 368 / 1314 » Reducing the Complexity of Reductions |
232
click to vote
TCAD
2008
15 years 7 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
139
click to vote
ICCD
2002
IEEE
16 years 4 months ago
2002
IEEE
Dynamically-loaded tagless loop caching reduces instruction fetch power for embedded software with small loops, but only supports simple loops without taken branches. Preloaded ta...
308
click to vote
APCSAC
2007
IEEE
16 years 1 months ago
2007
IEEE
Abstract. The perceptron predictor is a highly accurate branch predictor. Unfortunately this high accuracy comes with high complexity. The high complexity is the result of the larg...
174
click to vote
ICIP
2009
IEEE
16 years 8 months ago
2009
IEEE
Face detection has been well studied in terms of accuracy and speed. However, required memory size reduction is still poorly studied, which is becoming a critical issue as platfor...
205
click to vote
DAC
2009
ACM
16 years 8 months ago
2009
ACM
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...