6568 search results - page 369 / 1314 » Reducing the Complexity of Reductions |
170
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ICCD
2004
IEEE
16 years 4 months ago
2004
IEEE
Dynamic address compression schemes that exploit address locality can help reduce both address bus energy and cost simultaneously with only a small performance penalty. In this wo...
195
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ISPD
2010
ACM
16 years 2 months ago
2010
ACM
Standard cells are fundamental circuit building blocks designed at very early design stages. Nanometer standard cells are prone to lithography proximity and process variations. Ho...
155
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SC
2009
ACM
16 years 2 months ago
2009
ACM
This paper explores the design space of elastic buffer (EB) routers by evaluating three representative designs. We propose an enhanced two-stage EB router which maximizes through...
196
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ISCAS
2007
IEEE
16 years 1 months ago
2007
IEEE
— Reducing the leakage power in embedded SRAM memories is critical for low-power applications. Raising the source voltage of SRAM cells in standby mode reduces the leakage curren...
190
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VLSID
2005
IEEE
16 years 1 months ago
2005
IEEE
The primary advantage of using 3D-FPGA over 2D-FPGA is that the vertical stacking of active layers reduce the Manhattan distance between the components in 3D-FPGA than when placed...