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DFT
2002
IEEE
117views VLSI» more  DFT 2002»
16 years 19 days ago
Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation Exploitation
Conversion of the flip-flops of the circuit into scan cells helps ease the test challenge; yet test application time is increased as serial shift operations are employed. Furthe...
Ozgur Sinanoglu, Alex Orailoglu
ISLPED
2000
ACM
91views Hardware» more  ISLPED 2000»
16 years 1 days ago
New clock-gating techniques for low-power flip-flops
Two novel low power flip-flops are presented in the paper. Proposed flip-flops use new gating techniques that reduce power dissipation deactivating the clock signal. Presented cir...
Antonio G. M. Strollo, E. Napoli, Davide De Caro
MOBICOM
1999
ACM
16 years 1 hour ago
Query Localization Techniques for On-Demand Routing Protocols in ad hoc Networks
Mobile ad hoc networks are characterized by multi-hop wireless links, absence of any cellular infrastructure, and frequent host mobility. Design of efficient routing protocols in ...
Robert Castañeda, Samir Ranjan Das
CODES
1998
IEEE
15 years 12 months ago
Optimistic distributed timed cosimulation based on thread simulation model
In this paper, we present thread-based optimistic distributed timed cosimulation methods which reduce the overhead of optimistic simulation. First, we present thread simulation mo...
Sungjoo Yoo, Kiyoung Choi
VLSID
1998
IEEE
105views VLSI» more  VLSID 1998»
15 years 12 months ago
Optimizing Logic Design Using Boolean Transforms
When a Boolean function is transformed by exclusiveOR with a suitably selected transform function, the new functzon is often synthesized wzth significantly reduced hardware. `I�...
Pramit Chavda, James Jacob, Vishwani D. Agrawal