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IISWC
2009
IEEE
16 years 1 months ago
Logicalization of communication traces from parallel execution
—Communication traces are integral to performance modeling and analysis of parallel programs. However, execution on a large number of nodes results in a large trace volume that i...
Qiang Xu, Jaspal Subhlok, Rong Zheng, Sara Voss
TASE
2007
IEEE
16 years 1 months ago
Automating Language Evolution
The design and implementation of complex software systems ly spans multiple levels of abstractions. The concepts of el of abstractions and their interplay are represented by forma...
Markus Pizka, Elmar Jürgens
QEST
2006
IEEE
16 years 1 months ago
Compositional Performability Evaluation for STATEMATE
Abstract— This paper reports on our efforts to link an industrial state-of-the-art modelling tool to academic state-of-the-art analysis algorithms. In a nutshell, we enable timed...
Eckard Böde, Marc Herbstritt, Holger Hermanns...
ASPDAC
2006
ACM
178views Hardware» more  ASPDAC 2006»
16 years 1 months ago
Hardware architecture design of an H.264/AVC video codec
Abstract—H.264/AVC is the latest video coding standard. It significantly outperforms the previous video coding standards, but the extraordinary huge computation complexity and m...
Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
16 years 28 days ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...