6147 search results - page 1053 / 1230 » Requirements, Architectures and Risks |
215
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VLSID
2003
IEEE
2003
IEEE
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks
16 years 7 months ago
We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processo...
196
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HPCA
2007
IEEE
16 years 7 months ago
2007
IEEE
The emergence of multicore architectures will lead to an increase in the use of multithreaded applications that are prone to synchronization bugs, such as data races. Software sol...
245
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional ...
280
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SIGMOD
2007
ACM
16 years 7 months ago
2007
ACM
This paper presents HomeViews, a peer-to-peer middleware system for building personal data management applications. HomeViews provides abstractions and services for data organizat...
216
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EDBT
2006
ACM
16 years 7 months ago
2006
ACM
In [12] we introduce a novel architecture for data processing, based on a functional fusion between a data and a computation layer. In this demo we show how this architecture is le...