Sciweavers

6147 search results - page 120 / 1230
» Requirements, Architectures and Risks
Sort
View
ISCAS
2007
IEEE
99views Hardware» more  ISCAS 2007»
16 years 1 months ago
A Parallel Architecture for Hermitian Decoders: Satisfying Resource and Throughput Constraints
— Hermitian Codes offer desirable properties such as large code lengths, good error-correction at high code rates, etc. The main problem in making Hermitian codes practical is to...
Rachit Agarwal, Emanuel M. Popovici, Brendan O'Fly...
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
16 years 7 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
ICMAS
2000
15 years 8 months ago
Adaptive Agent Integration Architectures for Heterogeneous Team Members
Withthe proliferationof software agents and smart hardware devices there is a growing realization that large-scale problems can be addressed by integration of such standalone syst...
AAAI
1994
15 years 8 months ago
The Relationship between Architectures and Example-Retrieval Times
This paper proposes a method to find the most suitable architecture for a given response time requirement for Example-Retrieval (ER), which searches for the best match from a bulk...
Eiichiro Sumita, Naoya Nisiyama, Hitoshi Iida
VLSISP
2002
93views more  VLSISP 2002»
15 years 6 months ago
Efficient VLSI Architectures for Multiuser Channel Estimation in Wireless Base-Station Receivers
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
Sridhar Rajagopal, Srikrishna Bhashyam, Joseph R. ...