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FPL
2008
Springer
124views Hardware» more  FPL 2008»
15 years 8 months ago
Direct sigma-delta modulated signal processing in FPGA
The effectiveness of implementing bit-stream signal processing (BSSP) multiplier circuits in FPGAs, in terms of hardware resources and clock frequency, is presented. In particular...
Chiu-Wah Ng, Ngai Wong, Hayden Kwok-Hay So, Tung-S...
PERCOM
2005
ACM
16 years 6 months ago
MASTAQ: A Middleware Architecture for Sensor Applications with Statistical Quality Constraints
We present the design goals and functional components of MASTAQ, a data management middleware for pervasive applications that utilize sensor data. MASTAQ allows applications to sp...
Inseok Hwang, Qi Han, Archan Misra
ICCD
2003
IEEE
147views Hardware» more  ICCD 2003»
16 years 4 months ago
An Efficient VLIW DSP Architecture for Baseband Processing
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
Tay-Jyi Lin, Chin-Chi Chang, Chen-Chia Lee, Chein-...
ACSD
2009
IEEE
139views Hardware» more  ACSD 2009»
16 years 2 months ago
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
Stephen B. Furber, Andrew D. Brown
ICDAR
2009
IEEE
16 years 1 months ago
An RDF-Based Blackboard Architecture for Improving Table Analysis
Table analysis is a complex problem, involving searching solutions from a large search space. Studies show that finding the most credible answers to complex problems often requir...
Vanessa Long