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DATE
2007
IEEE
78views Hardware» more  DATE 2007»
16 years 1 months ago
Hardware scheduling support in SMP architectures
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified b...
André C. Nácul, Francesco Regazzoni,...
ITNG
2007
IEEE
16 years 1 months ago
On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture
In this paper, we present several enhanced network techniques which are appropriate for VLSI implementation and have reduced complexity, high throughput, and simple routing algori...
Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
CHES
2007
Springer
154views Cryptology» more  CHES 2007»
16 years 1 months ago
Multi-gigabit GCM-AES Architecture Optimized for FPGAs
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert ...
EUC
2005
Springer
16 years 22 days ago
New Area Management Method Based on "Pressure" for Plastic Cell Architecture
In the present paper, we propose a novel area management method based on the concept of “pressure”. Plastic Cell Architecture (PCA) is a dynamically reconfigurable architectur...
Taichi Nagamoto, Satoshi Yano, Mitsuru Uchida, Yui...
LSSC
2005
Springer
16 years 21 days ago
Systolic Architecture for Adaptive Censoring CFAR PI Detector
A new parallel algorithm for signal processing and a parallel systolic architecture of a robust constant false alarm rate (CFAR) processor with post-detection integration and adap...
Ivan Garvanov, Christo A. Kabakchiev, Plamen Daska...