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ACSAC
2010
IEEE
15 years 5 months ago
A framework for testing hardware-software security architectures
New security architectures are difficult to prototype and test at the design stage. Fine-grained monitoring of the interactions between hardware, the operating system, and applica...
Jeffrey S. Dwoskin, Mahadevan Gomathisankaran, Yu-...
FCCM
2009
IEEE
139views VLSI» more  FCCM 2009»
15 years 5 months ago
Memory-Efficient Pipelined Architecture for Large-Scale String Matching
We propose a pipelined field-merge architecture for memory-efficient and high-throughput large-scale string matching (LSSM). Our proposed architecture partitions the (8-bit) charac...
Yi-Hua Edward Yang, Viktor K. Prasanna
BWCCA
2010
15 years 2 months ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...
ASAP
2011
IEEE
247views Hardware» more  ASAP 2011»
14 years 7 months ago
High-throughput Contention-Free concurrent interleaver architecture for multi-standard turbo decoder
—To meet the higher data rate requirement of emerging wireless communication technology, numerous parallel turbo decoder architectures have been developed. However, the interleav...
Guohui Wang, Yang Sun, Joseph R. Cavallaro, Yuanbi...
ESORICS
2009
Springer
16 years 7 months ago
User-Centric Handling of Identity Agent Compromise
Digital identity credentials are a key enabler for important online services, but widespread theft and misuse of such credentials poses serious risks for users. We believe that an ...
Daisuke Mashima, Mustaque Ahamad, Swagath Kannan