6147 search results - page 279 / 1230 » Requirements, Architectures and Risks |
196
click to vote
MICRO
2003
IEEE
16 years 16 days ago
2003
IEEE
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
202
click to vote
ATAL
2003
Springer
16 years 15 days ago
2003
Springer
Optimal behavior is a very desirable property of autonomous agents and, as such, has received much attention over the years. However, making optimal decisions and executing optima...
210
click to vote
HOTI
2002
IEEE
16 years 6 days ago
2002
IEEE
We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
206
click to vote
IPPS
2002
IEEE
16 years 5 days ago
2002
IEEE
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
177
click to vote
ISCC
2002
IEEE
16 years 5 days ago
2002
IEEE
The competition on clients attention requires sites to update their content frequently. As a result, a large percentage of web pages are semi-dynamic, i.e., change quite often and...