6147 search results - page 280 / 1230 » Requirements, Architectures and Risks |
205
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FPL
2009
Springer
15 years 12 months ago
2009
Springer
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
232
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IDMS
2001
Springer
15 years 11 months ago
2001
Springer
This paper introduces a novel access control architecture for publicly accessible, wireless networks. The architecture was designed to address the requirements obtained from a case...
200
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CODES
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper discusses the trade-off between calculations and memory accesses in a 3D graphics tile renderer for visualization of data from medical scanners. The performance require...
175
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ISCA
1998
IEEE
15 years 11 months ago
1998
IEEE
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
208
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MICRO
1998
IEEE
15 years 11 months ago
1998
IEEE
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...