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DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 11 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli
ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
15 years 11 months ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
DESRIST
2009
Springer
137views Education» more  DESRIST 2009»
15 years 10 months ago
Language communities in enterprise architecture research
As a result of the rigor vs. relevance debate, researchers who focus on design research on organizational problems are beginning to focus on their research methodology’s rigor. ...
Joachim Schelp, Robert Winter
CONEXT
2005
ACM
15 years 9 months ago
Janus: an architecture for flexible access to sensor networks
We present the design and implementation of the Janus1 architecture for providing flexible and lightweight access to sensor network resources from Internet-type networks. Janus p...
Richard Gold
DEXAW
2006
IEEE
164views Database» more  DEXAW 2006»
15 years 9 months ago
A P2P Integration Architecture for Protein Resources
The availability of a direct pathway from a primary sequence (denovo or DNA derived) to macromolecular structure to biological function using computer-based tools is the ultimate ...
Kajal T. Claypool, Sanjay Kumar Madria