Sciweavers

6147 search results - page 311 / 1230
» Requirements, Architectures and Risks
Sort
View
MICRO
1999
IEEE
131views Hardware» more  MICRO 1999»
15 years 11 months ago
Value Prediction for Speculative Multithreaded Architectures
The speculative multithreading paradigm (speculative threadlevel parallelism) is based on the concurrent execution of control-speculative threads. The efficiency of microarchitect...
Pedro Marcuello, Jordi Tubella, Antonio Gonz&aacut...
ICSE
1999
IEEE-ACM
15 years 11 months ago
Product-Line Architectures in Industry: A Case Study
In this paper, a case study investigating the experiences from using product-line architectures is presented involving two swedish companies, Axis Communications AB and Securitas ...
Jan Bosch
ISCA
1998
IEEE
126views Hardware» more  ISCA 1998»
15 years 11 months ago
Switcherland: A QoS Communication Architecture for Workstation Clusters
Computer systems have become powerful enough to process continuous data streams such as video or animated graphics. While processing power and communication bandwidth of today...
Hans Eberle, Erwin Oertli
ISPAN
1997
IEEE
15 years 11 months ago
CASS: an efficient task management system for distributed memory architectures
The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the applica...
Jing-Chiou Liou, Michael A. Palis
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
15 years 11 months ago
Transactional Memory: Architectural Support for Lock-Free Data Structures
A shared data structure is lock-free if its operations do not require mutual exclusion. If one process is interrupted in the middle of an operation, other processes will not be pr...
Maurice Herlihy, J. Eliot B. Moss