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GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
14 years 10 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ISCA
2011
IEEE
313views Hardware» more  ISCA 2011»
14 years 10 months ago
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay ...
ATAL
2011
Springer
14 years 6 months ago
Online mechanism design for electric vehicle charging
Plug-in hybrid electric vehicles are expected to place a considerable strain on local electricity distribution networks, requiring charging to be coordinated in order to accommoda...
Enrico H. Gerding, Valentin Robu, Sebastian Stein,...
ICSR
2011
Springer
14 years 10 months ago
Improving Product Line Architecture Design and Customization by Raising the Level of Variability Modeling
Product Line Architecture (PLA) plays a central role in software product line development. In order to support architecture-level variability modeling, most architecture descriptio...
Jiayi Zhu, Xin Peng, Stan Jarzabek, Zhenchang Xing...
TON
2010
151views more  TON 2010»
15 years 1 months ago
Measurement-Driven Guidelines for 802.11 WLAN Design
Dense deployments of WLANs suffer from increased interference and as a result, reduced capacity. There are three main functions used to improve the overall network capacity: a) in...
Ioannis Broustis, Konstantina Papagiannaki, Srikan...